1. Field of the Invention
The present invention relates to a plasma display apparatus, and more particularly, to a plasma display apparatus and driving method thereof, in which an afterimage erroneous discharges generated when the apparatus is driven are prevented and damage to driving circuits is prevented.
2. Background of the Related Art
In general, a plasma display apparatus comprises a plasma display panel having a front substrate and a rear substrate. A barrier rib formed between the front substrate and the rear substrate forms one unit cell. Each cell is filled with a primary discharge gas, such as neon (Ne), helium (He) or a mixed gas of Ne+He, and an inert gas containing a small amount of xenon (Xe). If the inert gas is discharged with a high frequency voltage, vacuum ultraviolet rays are generated. Phosphors formed between the barrier ribs are excited to implement images. This plasma display panel can be manufactured to be thin, and has been considered one of the next-generation display devices.
FIG. 1 shows the construction of a common plasma display panel.
The plasma display panel comprises a front panel 100 and a rear panel 110. In the front panel 100, a plurality of sustain electrode pairs in which a plurality of scan electrodes 102 and sustain electrodes 103 are formed in pairs are arranged on a front glass 101, i.e., a display surface on which images are displayed. In the rear panel 110, a plurality of address electrodes 113 intersecting the plurality of sustain electrode pairs are arranged on a rear glass 111, i.e., a rear surface. The front panel 100 and the rear panel 110 are parallel to each other with a predetermined distance therebetween.
The front panel 100 comprises the pairs of scan electrodes 102 and sustain electrodes 103, which mutually discharge one another and maintain the emission of a cell within one discharge cell. In other words, the scan electrode 102 and the sustain electrode 103 has a transparent electrode “a” formed of a transparent ITO material and a bus electrode “b” formed of a metal material. The scan electrodes 102 and the sustain electrodes 103 are covered with one or more dielectric layers 104 for limiting the discharge current and providing insulation among the electrode pairs. A protection layer 105 having magnesium oxide (MgO) deposited thereon is formed on the dielectric layers 104 to facilitate a discharge condition.
In the rear panel 110, barrier ribs 112 of stripe form (or well form), for forming a plurality of discharge spaces, i.e., discharge cells are arranged parallel to one another. One or more address electrodes 113, which cause an inert gas within a discharge cell to generate vacuum ultraviolet rays through an address discharge, are disposed parallel to the barrier ribs 112. R, G and B phosphor layers 114 that radiate a visible ray for image display during a sustain discharge are coated on a top surface of the rear panel 110. A dielectric layer 115 for protecting the address electrodes 113 is formed between the address electrodes 113 and the phosphor layers 114.
In the plasma display panel constructed above, the discharge cell is formed in plural in matrix form. A driver (not shown) comprising a driving circuit for supplying a predetermined pulse to the discharge cell is attached to the plasma display panel.
FIG. 2 illustrates a method of implementing images of a conventional plasma display apparatus.
As shown in FIG. 2, in the plasma display apparatus, one frame period is divided into a plurality of sub-fields, each sub-field having a different number of discharges. The plasma display panel is excited in a sub-field period corresponding to a gray level value of an input image signal, thereby implementing images.
Each sub-field is divided into a reset period for uniformly generating a discharge, an address period for selecting a discharge cell and a sustain period for implementing gray levels depending on the number of discharges. For example, to display images with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 seconds is divided into eight sub-fields, as shown in FIG. 2.
Each of the eight sub-fields SF1 to SF8 is again divided into a reset period, an address period and a sustain period. In this case, the sustain period increases in the ratio of 2n (where, n=0, 1, 2, 3, 4, 5, 6, 7) in each sub-field. As described above, since the sustain period is varied in each sub-field, gray levels of images can be represented.
The driving principle of the plasma display apparatus constructed above will be described with reference to FIGS. 3a and 3b. 
FIG. 3a shows a driving waveform of the conventional plasma display apparatus.
As shown in FIG. 3, the plasma display apparatus is driven with it being divided into a reset period for initializing the entire cells, an address period for selecting cells to be discharged, a sustain period for sustaining the discharge of selected cells and an erase period for erasing wall charges within discharged cells.
In a set-up period of the reset period, a set-up waveform forming a rising ramp (Ramp-up) is applied to all of the scan electrodes at the same time. The set-up waveform generates a weak dark discharge within the discharge cells of the entire screen. The set-up discharge causes positive wall charges to be accumulated on the address electrodes and the sustain electrodes, and negative wall charges to be accumulated on the scan electrodes.
In a set-down period of the reset period, after the set-up waveform is applied, a set-down waveform forming a falling ramp (Ramp-down), which falls from a voltage level lower than the highest voltage level of the set-up discharge to a predetermined negative voltage level, is applied to the scan electrodes. Since a weak erase discharge is generated within cells, wall charges excessively formed on the scan electrodes are sufficiently erased. The set-down discharge causes wall charges of the degree in which an address discharge can be stably generated to uniformly remain within the cells.
In the address period, while a scan waveform forming a negative waveform is sequentially applied to the scan electrodes, an address waveform forming a positive waveform is applied to the address electrodes in synchronization with the scan waveform. As the voltage difference between the scan waveform and the address waveform and a wall voltage generated in the reset period are added, an address discharge is generated within the discharge cells to which the address waveform is applied.
Wall charges of the degree in which a sustain discharge can be generated when a sustain waveform is applied are formed within cells selected by the address discharge. The sustain electrode is supplied with a waveform having a positive bias voltage (Vzb) such that an erroneous discharge is not generated between the sustain electrode and the scan electrodes by reducing a voltage difference between the sustain electrode and the scan electrodes during the address period.
In the sustain period, a sustain waveform (sus) forming a positive waveform is alternately applied to the scan electrodes and the sustain electrode. As a wall voltage within the cells and a voltage of the sustain waveform are added together, a sustain discharge, i.e., a display discharge is generated between the scan electrode and the sustain electrode in cells selected by the address discharge whenever the sustain waveform is applied.
After the sustain discharge is completed, in the erase period, an erase waveform (Ramp-ers) having a narrow pulse width and a low voltage level are applied to the sustain electrodes, thereby erasing wall charges remaining within the cells of the entire screen.
Wall charges that are distributed within a discharge cell by this driving waveform will be described with reference to FIG. 3b. 
FIG. 3b illustrates wall charges distributed within a discharge cell according to the conventional driving waveform.
Referring to FIG. 3b, in the set-up period of the reset period, the set-up waveform is applied to the scan electrode Y and a waveform of a voltage level lower than that of the set-up waveform is applied to the sustain electrode Z and the address electrode X. Therefore, as shown in (a) of FIG. 3b, negative charges are located on the scan electrode Y and positive charges are located on the sustain electrode Z and the address electrode X.
In the set-down period, the set-down waveform is supplied to the scan electrode Y, and a predetermined bias voltage, preferably, a voltage of a ground (GND) level is supplied to the sustain electrode Z and the address electrode X and then maintained. Therefore, wall charges that are excessively accumulated within the discharge cell in the set-up period are partially erased, as shown in (b) of FIG. 3b. Through this erase process, distribution of wall charges within each discharge cell becomes irregular.
In the address period, an address discharge is generated as shown in (c) of FIG. 3b by means of the scan waveform supplied to the scan electrode Y and the address waveform supplied to the address electrode X.
Thereafter, in the sustain period, the sustain waveforms are alternately applied to the scan electrode Y and the sustain electrode Z, so that the sustain discharge is generated as shown in (d) of FIG. 3b. 
In the prior art, wall charges formed in the set-up period are erased mainly between the scan electrode Y and the address electrode X during the set-down period. Most of the wall charges formed between the scan electrode Y and the sustain electrode Z remain.
In the prior art, R (Red), G (Green) and B (Blue) cells form one unit pixel. When at least one cell of the unit pixel remains off when the apparatus is driven, charged particles diffuse from adjacent cells to cells that remain off. In this case, when the R (Red), G (Green) and B (Blue) cells form one unit pixel and at least one cell of the unit pixel remains off upon driving, the unit pixel forms a monochromatic pattern in a screen that is being implemented.
When the unit pixel forms the monochromatic pattern, a cell that remains off must not be turned on. Nevertheless, an erroneous discharge is generated between the scan electrode Y and the sustain electrode Z during the address period by charged particles diffused from cells adjacent to adhered wall charges during the set-down period. This is called an “afterimage erroneous discharge”. In the conventional plasma display apparatus, an afterimage erroneous discharge during the address period is connected to the sustain period and a sustain discharge is sustained. Therefore, a problem arises because spots are generated.
In the case where a waveform for erasing adhered wall charges is applied, there is a high probability that a discharge may be generated due to excessive wall charges formed in the set-up period. Therefore, a problem in that a distortion phenomenon of the display screen can occur must be taken into consideration.